Index: s3virge/TODO_NOTES
===================================================================
RCS file: /usr/local/src/cvsup-rep/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES,v
retrieving revision 1.20
diff -u -r1.20 TODO_NOTES
--- s3virge/TODO_NOTES	2001/11/21 22:43:00	1.20
+++ s3virge/TODO_NOTES	2002/01/10 02:20:50
@@ -23,6 +23,9 @@
 
 Status
 ------
+Ver 1.8.2
+DPMS testing, DGA testing
+
 11/11/01 KJB
 Ver 1.8.1
 ViRGE MX (& GX2) fix to CR63 for problems with modes < 1024x768 from 
Index: s3virge/s3v.h
===================================================================
RCS file: /usr/local/src/cvsup-rep/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h,v
retrieving revision 1.29
diff -u -r1.29 s3v.h
--- s3virge/s3v.h	2001/11/21 22:43:00	1.29
+++ s3virge/s3v.h	2002/01/06 07:37:28
@@ -132,7 +132,7 @@
 typedef struct {      
    unsigned char SR08, SR0A, SR0F;
    unsigned char SR10, SR11, SR12, SR13, SR15, SR18; /* SR9-SR1C, ext seq. */
-   unsigned char SR29;
+   unsigned char SR29, dpms_SR31_save;
    unsigned char SR54, SR55, SR56, SR57;
    unsigned char Clock;
    unsigned char s3DacRegs[0x101];
@@ -246,6 +246,8 @@
   int			LCDClk;
   /* MX reference clock scale		*/
   double refclk_fact;
+  /* LCD panel on flag */
+  Bool                  panelWasOn;
   /* Limit the number of errors	*/
   /* printed using a counter 	*/
   int			GEResetCnt;
Index: s3virge/s3v_dga.c
===================================================================
RCS file: /usr/local/src/cvsup-rep/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dga.c,v
retrieving revision 1.6
diff -u -r1.6 s3v_dga.c
--- s3virge/s3v_dga.c	2000/03/31 20:13:31	1.6
+++ s3virge/s3v_dga.c	2002/01/10 02:20:06
@@ -350,7 +350,11 @@
     S3VPtr ps3v = S3VPTR(pScrn);
 
     *name = NULL; 		/* no special device */
+#if 0
     *mem = (unsigned char*)ps3v->FBBase;
+#else
+    *mem = (unsigned char*)ps3v->PciInfo->memBase[0];
+#endif
     *size = ps3v->videoRambytes;
     *offset = 0;
     *flags = DGA_NEED_ROOT;
Index: s3virge/s3v_driver.c
===================================================================
RCS file: /usr/local/src/cvsup-rep/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v
retrieving revision 1.79
diff -u -r1.79 s3v_driver.c
--- s3virge/s3v_driver.c	2001/11/21 22:43:00	1.79
+++ s3virge/s3v_driver.c	2002/01/06 07:38:15
@@ -112,10 +112,10 @@
  
 #define S3VIRGE_NAME "S3VIRGE"
 #define S3VIRGE_DRIVER_NAME "s3virge"
-#define S3VIRGE_VERSION_NAME "1.8.1"
+#define S3VIRGE_VERSION_NAME "1.8.2"
 #define S3VIRGE_VERSION_MAJOR   1
 #define S3VIRGE_VERSION_MINOR   8
-#define S3VIRGE_PATCHLEVEL      1
+#define S3VIRGE_PATCHLEVEL      2
 #define S3VIRGE_DRIVER_VERSION ((S3VIRGE_VERSION_MAJOR << 24) | \
 				(S3VIRGE_VERSION_MINOR << 16) | \
 				S3VIRGE_PATCHLEVEL)
@@ -3090,7 +3090,9 @@
 	   sr8 = VGAIN8(0x3c5);
 	   VGAOUT8(0x3c5, 0x06);
 	   VGAOUT8(0x3c4, 0x31);
+	   ps3v->panelWasOn = FALSE;
 	   if (VGAIN8(0x3c5) & 0x10) { /* LCD on */
+	     ps3v->panelWasOn = TRUE;
 	     if (!ps3v->LCDClk) {  /* entered only once for first mode */
 	       int h_lcd, v_lcd;
 	       VGAOUT8(0x3c4, 0x61);
@@ -3886,7 +3888,8 @@
 			     int flags)
 {
   S3VPtr ps3v;
-  unsigned char sr8 = 0x0, srd = 0x0;
+  unsigned char sr8 = 0x0, srd = 0x0, srd_in, sr31 = 0x0;
+  char modestr[][40] = { "On","Standby","Suspend","Off" };
 
   ps3v = S3VPTR(pScrn);
   
@@ -3897,16 +3900,37 @@
   sr8 |= 0x6;
   VGAOUT8(0x3c5, sr8);
 
+  /* Read LCD panel state */
+  if (S3_ViRGE_MX_SERIES(ps3v->Chipset))
+    {
+      VGAOUT8(0x3c4, 0x31);
+      sr31 = VGAIN8(0x3c5);
+      if (sr31 & 0x10) 
+	{
+	  /* LCD on */
+	  ps3v->ModeReg.dpms_SR31_save = sr31;
+	  sr31 &= ~0x10;
+	}
+    }
+
   /* load SRD */
   VGAOUT8(0x3c4, 0x0d);
   srd = VGAIN8(0x3c5);
   
+  srd_in = srd;
+
   srd &= 0x03; /* clear the sync control bits of srd */
-  
+
   switch (PowerManagementMode) {
   case DPMSModeOn:
     /* Screen: On; HSync: On, VSync: On */
+    /* no srd change */
+
+    /* MX panel - On */
+    if( ps3v->panelWasOn )
+      sr31 = ps3v->ModeReg.dpms_SR31_save;
     break;
+
   case DPMSModeStandby:
     /* Screen: Off; HSync: Off, VSync: On */
     srd |= 0x10;
@@ -3926,6 +3950,18 @@
 
   VGAOUT8(0x3c4, 0x0d);
   VGAOUT8(0x3c5, srd);
+
+  /* Set LCD panel state */
+  if (S3_ViRGE_MX_SERIES(ps3v->Chipset))
+    {
+      VGAOUT8(0x3c4, 0x31);
+      VGAOUT8(0x3c5, sr31);
+    }
+
+  /* kjb cep */
+  xf86ErrorFVerb(/*VERBLEV*/ 1, "Power Manag: set:%s srd: %x,%x\n", 
+		 modestr[PowerManagementMode], srd_in, srd);
+  
 
   return;
 }